The present invention is directed to integrated circuits and their processing for the manufacture of semiconductor devices. More particularly, the invention provides a flash memory device and method using a differential cell design. But it would be recognized that the invention has a much broader range of applicability. For example, the invention can be applied to EEPROMs or other types of memory storage.
A variety of memory devices have been proposed or used in industry. An example of such a memory device is an erasable programmable read-only memory (“EPROM”) device. The EPROM device is both readable and erasable, i.e., programmable. In particular, an EPROM is implemented using a floating gate field effect transistor, which has binary states. That is, a binary state is represented by the presence of absence of charge on the floating gate. The charge is generally sufficient to prevent conduction even when a normal high signal is applied to the gate of the EPROM transistor.
Numerous varieties of EPROMs are available. In the traditional and most basic form, EPROMs are programmed electrically and erased by exposure to ultraviolet light. These EPROMs are commonly referred to as ultraviolet erasable programmable read-only memories (“UVEPROM”s). UVEPROMs can be programmed by running a high current between a drain and a source of the UVEPROM transistor while applying a positive potential to the gate. The positive potential on the gate attracts energetic (i.e., hot) electrons from the drain-to-source current, where the electrons jump or inject into the floating gate and become trapped on the floating gate.
Another form of EPROM is the electrically erasable programmable read-only memory (“EEPROM” or “E2 PROM”). EEPROMs are often programmed and erased electrically by way of a phenomenon known as Fowler-Nordheim tunneling. Still another form of EPROM is a “Flash EPROM,” which is programmed using hot electrons and erased using the Fowler-Nordheim tunneling phenomenon. Flash EPROMs can be erased in a “flash” or bulk mode in which all cells in an array or a portion of an array can be erased simultaneously using Fowler-Nordheim tunneling, and are commonly called “Flash cells” or “Flash devices.”
Various types of Flash cells have been proposed and utilized by the semiconductor industry. As merely an example, a split gate type structure includes a floating gate and a control gate, which has a split type structure. Such split gate structure has been used by companies such as Silicon Storage Technology, Inc. Unfortunately, certain limitations exist with such a split gate type cell structure. For example, such a cell structure may be difficult to shrink beyond a certain critical dimension such as 0.25 micron and below. These and other limitations of the conventional split gate cell have been described throughout the present specification and more particularly below.
From the above, it is seen that an improved technique for processing semiconductor devices is desired.